Grant of MPW patent enabling rapid VLSI prototyping

On September 9, 1983, US Patent 4,405,967, titled "Wafer-Scale Integration With Multi-Project Wafers," was granted, crediting Lynn Conway among its co-inventors.

This patent formalized the multi-project wafer (MPW) concept, a technique Conway had pioneered in practice years earlier that allowed many different chip designs—often from different research groups, universities, or companies—to be fabricated together on a single silicon wafer, sharing the enormous cost of a fabrication run.

Before the MPW approach, prototyping a single chip design was prohibitively expensive for most academic researchers and small companies, since fabrication runs were typically dedicated to a single design. By pooling multiple designs onto one wafer and using shared infrastructure (an approach Conway helped operationalize through the ARPA-funded MOSIS service), the cost per design dropped dramatically, democratizing access to chip fabrication.

The MPW model became a cornerstone of the modern semiconductor industry, enabling the rise of the fabless design model in which companies design chips without owning their own fabrication plants, instead relying on shared or contracted foundries. This patent, alongside her earlier VLSI design rules work, cemented Conway's role as one of the most consequential architects of how integrated circuits are conceived, prototyped, and manufactured worldwide.